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CPPC: a compiler‐assisted tool for portable checkpointing of message‐passing applications
(John Wiley & Sons Ltd., 2010-11-19)
[Abstract] With the evolution of high‐performance computing toward heterogeneous, massively parallel systems, parallel applications have developed new checkpoint and restart necessities. Whether due to a failure in the ...
Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience
(Springer New York LLC, 2013)
[Abstract] With the evolution of high-performance computing, parallel applications have developed an increasing necessity for fault tolerance, most commonly provided by checkpoint and restart techniques. Checkpointing tools ...
Extending an Application-Level Checkpointing Tool to Provide Fault Tolerance Support to OpenMP Applications
(Technische Universitaet Graz * Institut fuer Informationssysteme und Computer Medien,Graz University of Technology, Institute for Information Systems and Computer Media, 2014-09)
[Abstract] Despite the increasing popularity of shared-memory systems, there is a lack of tools for providing fault tolerance support to shared-memory applications. CPPC (ComPiler for Portable Checkpointing) is an ...
Volatile STT-RAM Scratchpad Design and Data Allocation for Low Energy
(Association for Computing Machinery, 2015)
[Abstract] On-chip power consumption is one of the fundamental challenges of current technology scaling. Cache memories consume a sizable part of this power, particularly due to leakage energy. STT-RAM is one of several ...
Simulating the Network Activity of Modern Manycores
(Institute of Electrical and Electronics Engineers Inc., 2019)
[Abstract]: Manycore architectures are one of the most promising candidates to reach the exascale. However, the increase in the number of cores on a single die exacerbates the memory wall problem. Modern manycore architectures ...
Truncated SIMD Multiplier Architecture for Approximate Computing in Low-Power Programmable Processors
(Institute of Electrical and Electronics Engineers, 2019)
[Abstract]: Approximate computing has been exploited for many years in application-specific architectures. Recently, it has also been proposed for low-power programmable processors. However, this poses some challenges as, ...
Optimizing Coherence Traffic in Manycore Processors Using Closed-Form Caching/Home Agent Mappings
(Institute of Electrical and Electronics Engineers, 2021-02-09)
[Abstract]
Manycore processors feature a high number of general-purpose cores designed to work in a multithreaded fashion. Recent manycore processors are kept coherent using scalable distributed directories. A paramount ...