• A Heuristic Approach for the Automatic Insertion of Checkpoints in Message-Passing Codes 

      Rodríguez, Gabriel; Martín, María J.; González, Patricia; Touriño, Juan (Technische Universitaet Graz * Institut fuer Informationssysteme und Computer Medien,Graz University of Technology, Institute for Information Systems and Computer Media, 2009-08)
      [Abstract] Checkpointing tools may be typically implemented at two different abstraction levels: at the system level or at the application level. The latter has become a more popular alternative due to its flexibility and ...
    • A Novel Compiler Support for Automatic Parallelization on Multicore Systems 

      Andión, José M.; Arenaz Silva, Manuel; Rodríguez, Gabriel; Touriño, Juan (Elsevier, 2013-09)
      [Abstract] The widespread use of multicore processors is not a consequence of significant advances in parallel programming. In contrast, multicore processors arise due to the complexity of building power-efficient, ...
    • Affine Modeling of Program Traces 

      Rodríguez, Gabriel; Kandemir, Mahmut T.; Touriño, Juan (Institute of Electrical and Electronics Engineers, 2019-02-01)
      [Abstract] A formal, high-level representation of programs is typically needed for static and dynamic analyses performed by compilers. However, the source code of target applications is not always available in an analyzable ...
    • Analysis of Performance-impacting Factors on Checkpointing Frameworks: The CPPC Case Study 

      Rodríguez, Gabriel; Martín, María J.; Touriño, Juan; González, Patricia (Oxford University Press, 2011-11-01)
      [Abstract] This paper focuses on the performance evaluation of Compiler for Portable Checkpointing (CPPC), a tool for the checkpointing of parallel message-passing applications. Its performance and the factors that impact ...
    • Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience 

      Rodríguez, Gabriel; Martín, María J.; González, Patricia; Touriño, Juan; Doallo, Ramón (Springer New York LLC, 2013)
      [Abstract] With the evolution of high-performance computing, parallel applications have developed an increasing necessity for fault tolerance, most commonly provided by checkpoint and restart techniques. Checkpointing tools ...
    • CPPC: a compiler‐assisted tool for portable checkpointing of message‐passing applications 

      Rodríguez, Gabriel; Martín, María J.; González, Patricia; Touriño, Juan; Doallo, Ramón (John Wiley & Sons Ltd., 2010-11-19)
      [Abstract] With the evolution of high‐performance computing toward heterogeneous, massively parallel systems, parallel applications have developed new checkpoint and restart necessities. Whether due to a failure in the ...
    • Extending an Application-Level Checkpointing Tool to Provide Fault Tolerance Support to OpenMP Applications 

      Losada, Nuria; Martín, María J.; Rodríguez, Gabriel; González, Patricia (Technische Universitaet Graz * Institut fuer Informationssysteme und Computer Medien,Graz University of Technology, Institute for Information Systems and Computer Media, 2014-09)
      [Abstract] Despite the increasing popularity of shared-memory systems, there is a lack of tools for providing fault tolerance support to shared-memory applications. CPPC (ComPiler for Portable Checkpointing) is an ...
    • Failure Avoidance in MPI Applications Using an Application-Level Approach 

      Cores González, Iván; Rodríguez, Gabriel; González, Patricia; Martín, María J. (Oxford University Press, 2014)
      [Abstract] Execution times of large-scale computational science and engineering parallel applications are usually longer than the mean-time-between-failures. For this reason, hardware failures must be tolerated by the ...
    • Improving Scalability of Application-Level Checkpoint-Recovery by Reducing Checkpoint Sizes 

      Cores González, Iván; Rodríguez, Gabriel; Martín, María J.; González, Patricia; Osorio, Roberto (Springer Japan KK, 2013)
      [Abstract] The execution times of large-scale parallel applications on nowadays multi/many-core systems are usually longer than the mean time between failures. Therefore, parallel applications must tolerate hardware failures ...
    • In-memory application-level checkpoint-based migration for MPI programs 

      Cores González, Iván; Rodríguez, Gabriel; Martín, María J.; González, Patricia (Springer New York LLC, 2014)
      [Abstract] Process migration provides many benefits for parallel environments including dynamic load balancing, data access locality or fault tolerance. This paper describes an in-memory application-level checkpoint-based ...
    • Locality-Aware Automatic Parallelization for GPGPU with OpenHMPP Directives 

      Andión, José M.; Arenaz Silva, Manuel; Bodin, François; Rodríguez, Gabriel; Touriño, Juan (Springer New York LLC, 2016-06)
      [Abstract] The use of GPUs for general purpose computation has increased dramatically in the past years due to the rising demands of computing power and their tremendous computing capacity at low cost. Hence, new programming ...
    • Optimizing Coherence Traffic in Manycore Processors Using Closed-Form Caching/Home Agent Mappings 

      Kommrusch, Steve; Horro, Marcos; Pouchet, Louis-Noël; Rodríguez, Gabriel; Touriño, Juan (Institute of Electrical and Electronics Engineers, 2021-02-09)
      [Abstract] Manycore processors feature a high number of general-purpose cores designed to work in a multithreaded fashion. Recent manycore processors are kept coherent using scalable distributed directories. A paramount ...
    • Parallel Hierarchical Radiosity on Hybrid Platforms 

      Padrón, Emilio J.; Amor, Margarita; Bóo, Montserrat; Doallo, Ramón; Rodríguez, Gabriel (Springer Verlag, 2011-12)
      [Abstract] Achieving an efficient realistic illumination is an important aim of research in computer graphics. In this paper a new parallel global illumination method for hybrid systems based on the hierarchical radiosity ...
    • Representing Integer Sequences Using Piecewise-Affine Loops 

      Rodríguez, Gabriel; Pouchet, Louis-Noël; Touriño, Juan (MDPI, 2021)
      [Abstract] A formal, high-level representation of programs is typically needed for static and dynamic analyses performed by compilers. However, the source code of target applications is not always available in an analyzable ...
    • Truncated SIMD Multiplier Architecture for Approximate Computing in Low-Power Programmable Processors 

      Osorio, Roberto; Rodríguez, Gabriel (Institute of Electrical and Electronics Engineers, 2019)
      [Abstract]: Approximate computing has been exploited for many years in application-specific architectures. Recently, it has also been proposed for low-power programmable processors. However, this poses some challenges as, ...
    • Volatile STT-RAM Scratchpad Design and Data Allocation for Low Energy 

      Rodríguez, Gabriel; Touriño, Juan; Kandemir, Mahmut (Association for Computing Machinery, 2015)
      [Abstract] On-chip power consumption is one of the fundamental challenges of current technology scaling. Cache memories consume a sizable part of this power, particularly due to leakage energy. STT-RAM is one of several ...