Listar por autor "Osorio, Roberto"

Mostrando ítems 1-9 de 9

    • A Microprogrammed Approach for Implementing Statecharts 

      Cereijo García, Javier; Osorio, Roberto (Institute of Electrical and Electronics Engineers, 2019-10-21)
      [Abstract] Statechart diagrams allow specifying complex systems in which there may be several states active at the same time and a large number of events and transitions to evaluate. Statecharts have been found useful in ...

    • An Efficient Ant Colony Optimization Framework for HPC Environments 

      González, Patricia; Osorio, Roberto; Pardo, Xoán C.; Banga, Julio R.; Doallo, Ramón (Elsevier, 2022)
      [Abstract] Combinatorial optimization problems arise in many disciplines, both in the basic sciences and in applied fields such as engineering and economics. One of the most popular combinatorial optimization methods is ...

    • Comparison of Hardwired and Microprogrammed Statechart Implementations 

      Cereijo García, Javier; Osorio, Roberto (MDPI, 2020)
      [Abstract]: In scientific facilities such as particle accelerators, fast and jitter-free synchronization is required in order to trigger a large number of actuators at the right time in a variety of situations. The behaviour ...

    • Floating Point Calculation of the Cube Function on FPGAs 

      Osorio, Roberto (Institute of Electrical and Electronics Engineers, 2023)
      [Abstract]: Specialized arithmetic units allow fast and efficient computation of lesser used mathematical functions. The overall impact of those units would be negligible in a general purpose processor, as added circuitry ...

    • Hardware Implementation of Statecharts for FPGA-based Control in Scientific Facilities 

      Cereijo García, Javier; Osorio, Roberto (Institute of Electrical and Electronics Engineers, 2020-01-16)
      [Abstract] The problem of generating complex synchronization patterns using automated tools is addressed in this paper. This work was originally motivated by the need of fast and jitter free synchronization in scientific ...

    • High-Speed FPGA Architecture for CABAC Decoding Acceleration in H.264/AVC Standard 

      Osorio, Roberto; Díaz Bruguera, Javier (Springer New York LLC, 2013-08)
      [Abstract] Video encoding and decoding are computing intensive applications that require high performance processors or dedicated hardware. Video decoding offers a high parallel processing potential that may be exploited. ...

    • Implementation of a motion estimation algorithm for Intel FPGAs using OpenCL 

      Castro, Manuel de; Osorio, Roberto; López Vilariño, David; González-Escribano, Arturo; Llanos, Diego R. (Springer, 2023)
      [Abstract]: Motion Estimation is one of the main tasks behind any video encoder. It is a computationally costly task; therefore, it is usually delegated to specific or reconfigurable hardware, such as FPGAs. Over the years, ...

    • Improving Scalability of Application-Level Checkpoint-Recovery by Reducing Checkpoint Sizes 

      Cores González, Iván; Rodríguez, Gabriel; Martín, María J.; González, Patricia; Osorio, Roberto (Springer Japan KK, 2013)
      [Abstract] The execution times of large-scale parallel applications on nowadays multi/many-core systems are usually longer than the mean time between failures. Therefore, parallel applications must tolerate hardware failures ...

    • Truncated SIMD Multiplier Architecture for Approximate Computing in Low-Power Programmable Processors 

      Osorio, Roberto; Rodríguez, Gabriel (Institute of Electrical and Electronics Engineers, 2019)
      [Abstract]: Approximate computing has been exploited for many years in application-specific architectures. Recently, it has also been proposed for low-power programmable processors. However, this poses some challenges as, ...