New Tridiagonal Systems Solvers on GPU Architectures

UDC.coleccionInvestigaciónes_ES
UDC.conferenceTitleHiPC 2015es_ES
UDC.departamentoEnxeñaría de Computadoreses_ES
UDC.endPage93es_ES
UDC.grupoInvGrupo de Arquitectura de Computadores (GAC)es_ES
UDC.startPage85es_ES
dc.contributor.authorPérez Diéguez, Adrián
dc.contributor.authorAmor, Margarita
dc.contributor.authorDoallo, Ramón
dc.date.accessioned2025-01-20T12:52:33Z
dc.date.available2025-01-20T12:52:33Z
dc.date.issued2015
dc.descriptionThis version of the article has been accepted for publication, after peer review. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The Version of Record is available online at: https://doi.org/10.1109/HiPC.2015.17es_ES
dc.description.abstract[Abstract]: Modern GPUs (Graphics Processing Units) offer very high computing power at relatively low cost. Nevertheless, designing efficient algorithms for the GPUs usually requires additional time and effort, even for experienced programmers. On the other hand, tridiagonal systems solvers are an important building block for a wide range of applications. In this paper, we present a new tuning parallel proposal in order to generate new tridiagonal systems solvers. This proposal is based on the combination of a new reduction algorithm (Redundant Reduction-RR) with a tuning proposal to generate efficient parallel prefix algorithms on the GPU. Specifically, we present two new solvers combining RR with two GPU efficient parallel prefix patterns. The performance of the resulting proposals was analyzed using three different CUDA GPUs, obtaining an improvement of up to 20.5x over the CUSPARSE library and 28.9x over CUDPP.es_ES
dc.description.sponsorshipThis research has been supported by the Galician Government (Xunta de Galicia) under the Consolidation Program of Competitive Reference Groups, cofunded by FEDER funds of the EU (Ref. GRC2013/055); and by the Ministry of Economy and Competitiveness of Spain and FEDER funds of the EU (Project TIN2013-42148-P). This work is also partially supported by EU under the COST Program Action IC1305: Network for Sustainable Ultrascale Computing (NESUS).es_ES
dc.description.sponsorshipXunta de Galicia; GRC2013/055es_ES
dc.description.sponsorshipPresentado en: 2015 IEEE 22nd International Conference on High Performance Computing (HiPC), 16-19 December 2015es_ES
dc.identifier.citationA. P. Diéguez, M. Amor and R. Doallo, "New Tridiagonal Systems Solvers on GPU Architectures," 2015 IEEE 22nd International Conference on High Performance Computing (HiPC), Bengaluru, India, 2015, pp. 85-94, doi: 10.1109/HiPC.2015.17.es_ES
dc.identifier.doi10.1109/HiPC.2015.17
dc.identifier.isbn978146738487-2
dc.identifier.urihttp://hdl.handle.net/2183/40780
dc.language.isoenges_ES
dc.publisherInstitute of Electrical and Electronics Engineers Inc.es_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/MINECO/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TIN2013-42148-P/ES/NUEVOS DESAFIOS EN COMPUTACION DE ALTAS PRESTACIONES: DESDE ARQUITECTURAS HASTA APLICACIONESes_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/EC/H2020/IC1305es_ES
dc.relation.urihttps://doi.org/10.1109/HiPC.2015.17es_ES
dc.rights© 2015 IEEE.es_ES
dc.rights.accessRightsopen accesses_ES
dc.subjectGPUes_ES
dc.subjectTridiagonal system solverses_ES
dc.subjectTuninges_ES
dc.titleNew Tridiagonal Systems Solvers on GPU Architectureses_ES
dc.typeconference outputes_ES
dspace.entity.typePublication
relation.isAuthorOfPublication31d7c9d0-70ef-44ef-af1d-e40f560c41bc
relation.isAuthorOfPublicationc98c1fe1-2016-44c1-9225-43fe1c6b8088
relation.isAuthorOfPublicationb3302f65-05d3-4b2c-b8b3-8503e58bba5e
relation.isAuthorOfPublication.latestForDiscovery31d7c9d0-70ef-44ef-af1d-e40f560c41bc

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