BPLG: A Tuned Butterfly Processing Library for GPU Architectures

UDC.coleccionInvestigaciónes_ES
UDC.departamentoEnxeñaría de Computadoreses_ES
UDC.endPage1102es_ES
UDC.grupoInvGrupo de Arquitectura de Computadores (GAC)es_ES
UDC.issue6es_ES
UDC.journalTitleInternational Journal of Parallel Programminges_ES
UDC.startPage1078es_ES
UDC.volume43es_ES
dc.contributor.authorLobeiras Blanco, Jacobo
dc.contributor.authorAmor, Margarita
dc.contributor.authorDoallo, Ramón
dc.date.accessioned2025-01-15T08:43:22Z
dc.date.available2025-01-15T08:43:22Z
dc.date.issued2015
dc.descriptionThis version of the article has been accepted for publication, after peer review (when applicable) and is subject to Springer Nature’s AM terms of use, but is not the Version of Record and does not reflect post-acceptance improvements, or any corrections. The Version of Record is available online at: http://dx.doi.org/10.1007/s10766-014-0323-8es_ES
dc.description.abstract[Abstract]: In order to increase the efficiency of existing software many works are incorporating GPU processing. However, despite the current advances in GPU languages and tools, taking advantage of their parallel architecture is still far more complex than programming standard multi-core CPUs. In this work, we present a library based on a set of building blocks that enable to easily design well-known algorithms with little effort. More specifically, we implement butterfly algorithms with this library, that is, a set of orthogonal signal transforms and an algorithm to solve tridiagonal equations systems. Thanks to the parametrization of the building blocks, the library can be easily tuned depending on the desired GPU architecture. This generic approach can be used to easily design these GPU algorithms while obtaining competitive performance on two recent NVIDIA GPU architectures, which results specially interesting from the productivity point of view.es_ES
dc.description.sponsorshipThis research has been supported by the Galician Government (Xunta de Galicia) under the Consolidation Program of Competitive Reference Groups, cofunded by the Ministry of Economy and Competitiveness of Spain and FEDER funds of the EU (Project TIN2013-42148-P)es_ES
dc.identifier.citationLobeiras, J., Amor, M. & Doallo, R. BPLG: A Tuned Butterfly Processing Library for GPU Architectures. Int J Parallel Prog 43, 1078–1102 (2015). https://doi.org/10.1007/s10766-014-0323-8es_ES
dc.identifier.doi10.1007/s10766-014-0323-8
dc.identifier.issn0885-7458
dc.identifier.urihttp://hdl.handle.net/2183/40722
dc.language.isoenges_ES
dc.publisherSpringer New York LLCes_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/MINECO/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TIN2013-42148-P/ES/NUEVOS DESAFIOS EN COMPUTACION DE ALTAS PRESTACIONES: DESDE ARQUITECTURAS HASTA APLICACIONESes_ES
dc.relation.urihttps://doi.org/10.1007/s10766-014-0323-8es_ES
dc.rightsCopyright © 2014, Springer Science Business Media New Yorkes_ES
dc.rights.accessRightsopen accesses_ES
dc.subjectSignal processinges_ES
dc.subjectFFTes_ES
dc.subjectDCTes_ES
dc.subjectHartleyes_ES
dc.subjectTridiagonal equation systemes_ES
dc.subjectGPGPUes_ES
dc.subjectCUDAes_ES
dc.subjecttuned libraryes_ES
dc.titleBPLG: A Tuned Butterfly Processing Library for GPU Architectureses_ES
dc.typejournal articlees_ES
dspace.entity.typePublication
relation.isAuthorOfPublication0124b851-fdc5-473b-a559-32a1954aafd0
relation.isAuthorOfPublicationc98c1fe1-2016-44c1-9225-43fe1c6b8088
relation.isAuthorOfPublicationb3302f65-05d3-4b2c-b8b3-8503e58bba5e
relation.isAuthorOfPublication.latestForDiscovery0124b851-fdc5-473b-a559-32a1954aafd0

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