SPLG: A Tuned Signal Processing Library for GPU Architectures

UDC.coleccionInvestigaciónes_ES
UDC.conferenceTitleSBAC-PAD 2013es_ES
UDC.departamentoEnxeñaría de Computadoreses_ES
UDC.endPage191es_ES
UDC.grupoInvGrupo de Arquitectura de Computadores (GAC)es_ES
UDC.startPage184es_ES
dc.contributor.authorLobeiras Blanco, Jacobo
dc.contributor.authorAmor, Margarita
dc.contributor.authorDoallo, Ramón
dc.date.accessioned2025-01-14T12:14:04Z
dc.date.available2025-01-14T12:14:04Z
dc.date.issued2013
dc.descriptionPresented at: 25th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2013, 23 through 26 October 2013es_ES
dc.descriptionThis version of the article has been accepted for publication, after peer review. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The Version of Record is available online at: https://doi.org/10.1109/SBAC-PAD.2013.30es_ES
dc.description.abstract[Abstract]: In order to increase the efficiency of existing software many works are incorporating GPU processing. However, despite the current advances in GPU languages and tools, taking advantage of their parallel architecture is still far more complex than programming standard multi-core CPUs. Performance profiling and analysis of known applications provides a useful insight of the hardware architecture and memory hierarchy. Afterwards, this analysis can be used to identify potential bottlenecks and tune other software so it can make a more efficient usage of the available resources. In this work we implement a small signal processing library which will be used to characterize the performance of most recent NVIDIA GPU architectures. The methodology used in our signal processing library is based on a series of building blocks that enable us to easily design several well-known algorithms with little effort. The library was built paying special attention to flexibility and adaptability. In this work we also show how a generic approach can be used to easily design these GPU algorithms while obtaining competitive performance, which results specially interesting from the productivity standpoint.es_ES
dc.description.sponsorshipThis research has been economically supported by Xunta de Galicia under project CN2012/211, cofunded by FEDER funds of the European Union under the grant TIN2010–16735.es_ES
dc.description.sponsorshipXunta de Galicia; CN2012/211es_ES
dc.identifier.citationJ. L. Blanco, M. Amor and R. Doallo, "SPLG: A Tuned Signal Processing Library for GPU Architectures," 2013 25th International Symposium on Computer Architecture and High Performance Computing, Porto de Galinhas, Brazil, 2013, pp. 184-191, doi: 10.1109/SBAC-PAD.2013.30es_ES
dc.identifier.doi10.1109/SBAC-PAD.2013.30
dc.identifier.issn1550-6533
dc.identifier.urihttp://hdl.handle.net/2183/40699
dc.language.isoenges_ES
dc.publisherIEEE Computer Societyes_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/MICINN/Plan Nacional de I+D+i 2008-2011/TIN2010–16735/ES/ARQUITECTURAS, SISTEMAS Y HERRAMIENTAS PARA COMPUTACION DE ALTAS PRESTACIONESes_ES
dc.relation.urihttps://doi.org/10.1109/SBAC-PAD.2013.30es_ES
dc.rights© 2013 IEEE.es_ES
dc.rights.accessRightsopen accesses_ES
dc.subjectCUDAes_ES
dc.subjectDCTes_ES
dc.subjectFFTes_ES
dc.subjectGPGPUes_ES
dc.subjectHartleyes_ES
dc.subjectSignal processinges_ES
dc.subjectTuned libraryes_ES
dc.titleSPLG: A Tuned Signal Processing Library for GPU Architectureses_ES
dc.typeconference outputes_ES
dspace.entity.typePublication
relation.isAuthorOfPublication0124b851-fdc5-473b-a559-32a1954aafd0
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relation.isAuthorOfPublication.latestForDiscovery0124b851-fdc5-473b-a559-32a1954aafd0

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