Floating Point Calculation of the Cube Function on FPGAs
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Floating Point Calculation of the Cube Function on FPGAsAuthor(s)
Date
2023Citation
R. R. Osorio, "Floating Point Calculation of the Cube Function on FPGAs," in IEEE Transactions on Parallel and Distributed Systems, vol. 34, no. 1, pp. 372-382, 1 Jan. 2023, doi: 10.1109/TPDS.2022.3220039.
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https://doi.org/10.1109/TPDS.2022.3220039
Abstract
[Abstract]: Specialized arithmetic units allow fast and efficient computation of lesser used mathematical functions. The overall impact of those units would be negligible in a general purpose processor, as added circuitry makes chips more complex despite most software would seldom make use of it. On the opposite side, custom computing machines are built for a specific task, and they can always benefit from specialized units if they are available. In this work, floating point architectures are proposed for computing the cube on Intel and Xilinx FPGAs. Those implementations reduce the cost and latency compared to using simple floating point multiplications and squarers.
Keywords
Floating-point arithmetic
Numerical analysis
Field programmable gate arrays
Digital integrated circuits
Numerical analysis
Field programmable gate arrays
Digital integrated circuits
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The final published paper is available online at:
https://doi.org/10.1109/TPDS.2022.3220039
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ISSN
1045-9219
1558-2183
1558-2183