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Comparison of Hardwired and Microprogrammed Statechart Implementations
dc.contributor.author | Cereijo García, Javier | |
dc.contributor.author | Osorio, Roberto | |
dc.date.accessioned | 2024-01-12T19:40:48Z | |
dc.date.available | 2024-01-12T19:40:48Z | |
dc.date.issued | 2020 | |
dc.identifier.citation | Cereijo García, J.; Osorio, R.R. Comparison of Hardwired and Microprogrammed Statechart Implementations. Electronics 2020, 9, 1139. https://doi.org/10.3390/electronics9071139 | es_ES |
dc.identifier.issn | 2079-9292 | |
dc.identifier.uri | http://hdl.handle.net/2183/34894 | |
dc.description.abstract | [Abstract]: In scientific facilities such as particle accelerators, fast and jitter-free synchronization is required in order to trigger a large number of actuators at the right time in a variety of situations. The behaviour of the control systems and subsystems may be specified by using statechart diagrams, which expand the capabilities of finite state machines allowing concurrency, a hierarchy of states, and history. Hence, there is a need of tools for synthesizing those diagrams so that a new control configuration may be deployed in a short time and an error-free manner in the required environments. In this work, we present a tool that analyses the specification of a variant of the State Chart XML (SCXML) standard tailored to hardware systems and produces a hardware description language (HDL) code suited to implement the required control systems using FPGAs. A number of solutions are provided to deal with the specific features of statecharts, such as multiple triggering events and concurrent super-states. We also present a microprogrammed architecture able to implement statecharts defined as firmware. Finally, we compare the advantages of each strategy in terms of usability, resource usage, and performance, and their applicability to a specific facility is evaluated. | es_ES |
dc.description.sponsorship | This research was funded in part by the Ministry of Science and Innovation of Spain (project TIN2016-75845-P, AEI/FEDER/EU), Xunta de Galicia and FEDER funds of the EU under the Consolidation Program of Competitive Reference Groups (ED431C 2017/04), and under the Centro de Investigación de Galicia accreditation 2019-2022 (ED431G 2019/01). | es_ES |
dc.description.sponsorship | Xunta de Galicia; ED431C 2017/04 | es_ES |
dc.description.sponsorship | Xunta de Galicia; ED431G 2019/01 | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | MDPI | es_ES |
dc.relation | info:eu-repo/grantAgreement/MINECO/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TIN2016-75845-P/ES/NUEVOS DESAFIOS EN COMPUTACION DE ALTAS PRESTACIONES: DESDE ARQUITECTURAS HASTA APLICACIONES (II)/ | es_ES |
dc.relation.uri | https://doi.org/10.3390/electronics9071139 | es_ES |
dc.rights | Atribución 4.0 Internacional | es_ES |
dc.rights.uri | http://creativecommons.org/licenses/by/3.0/es/ | * |
dc.subject | Statecharts | es_ES |
dc.subject | Finite state machines | es_ES |
dc.subject | Industrial control | es_ES |
dc.subject | FPGA | es_ES |
dc.title | Comparison of Hardwired and Microprogrammed Statechart Implementations | es_ES |
dc.type | info:eu-repo/semantics/article | es_ES |
dc.rights.access | info:eu-repo/semantics/openAccess | es_ES |
UDC.journalTitle | Electronics | es_ES |
UDC.volume | 9 | es_ES |
UDC.issue | 7 | es_ES |
UDC.startPage | 1139 | es_ES |
dc.identifier.doi | 10.3390/electronics9071139 |
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